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o1712hkpc 5-6405 no. a2139-1/11 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 STK672-110-SL-E overview the STK672-110-SL-E is a hybrid ic for use as a unipolar, 2-phase stepping motor driver with pwm current control. applications ? office photocopiers, printers, etc. features ? the motor speed can be controlled by the frequency of an external clock signal (the clock pin signal). ? the excitation type is switched according to the state (low or high) of the mode pin. the m ode is set to 2-phase or 1-2phase excitation on the rising edge of the clock signal. ? a motor direction switching pin (the cwb pin) is provided. ? all inputs are schmitt inputs and 40k (typical: ?50 to +100%) pull-up resistors are built in. ? the motor current can be set by changing the vref pin voltage. since a 0.22 current detection resistor is built in, a current of 1a is set for each 0.22v of applied voltage. ? the input frequency range for the clock signal used for motor speed co ntrol is 0 to 25khz. ? supply voltage ranges: v cc = 10 to 42v, v dd = 5.0v 5% ? this ic supports motor operating currents of up to 1.8a at tc = 105c, and of up to 2.65a at tc = 25c. ordering number : ena2139 thick-film hybrid ic 2-phase stepping motor driver
STK672-110-SL-E no. a2139-2/11 specifications absolute maximum ratings at tc = 25 c parameter symbol conditions ratings unit maximum supply voltage 1 v cc max no signal 52 v maximum supply voltage 2 v dd max no signal -0.3 to +7.0 v input voltage v in max logic input pins -0.3 to +7.0 v output current i oh max 10 a 1 pulse (resistance load) 2.65 a repeated avalanche capacity ear max 28 mj allowable power dissipation pd max with an arbitrarily large heat sink. per mosfet 6.5 w operating substrate temperature tc max 105 c junction temperature tj max 150 c storage temperature tstg -40 to +125 c allowable operating ranges at ta=25 c parameter symbol conditions ratings unit operating supply voltage 1 v cc with signals applied 10 to 42 v operating supply voltage 2 v dd with signals applied 5 5% v input high voltage v ih pin 8, 9, 10, 11 and 12 0 to v dd v output current 1 i oh 1 tc=105 c, clock 200hz 1.8 a output current 2 i oh 2 tc=80 c, clock 200hz, see the motor current (i oh ) derating curve 2.1 a clock frequency f cl minimum pulse width: 20 s 0 to 25 khz phase driver withstand voltage v dss i d =1ma (tc=25 c) 100min v electrical characteristics at tc=25 c, v cc =24v, v dd =5.0v parameter symbol conditions min typ max unit v dd supply current i cco clock=gnd 2.6 6 ma output average current ioave with r/l = 3 /3.8mh in each phase vref = 0.176v 0.41 0.45 0.50 a fet diode forward voltage vdf if=1a (r l =23 ) 1.2 1.8 v output saturation voltage vsat r l =23 0.73 1.02 v high-level input voltage v ih pins 6 to 9 (4 pins) 4.0 v low-level input voltage v il pins 6 to 9 (4 pins) 1.0 v input current i il with pins 6 to 9 at the ground level. pull-up resistance: 40k (typical) 62 125 250 a vref input voltage vrh pin 12 0 3.5v vref input bias current i ib with pin 12 at 1v 50 500 na notes: a fixed-voltage power supply must be used. stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
STK672-110-SL-E no. a2139-3/11 package dimensions unit:mm (typ) figure 1 derating curve of motor current, i oh, vs. STK672-110-SL-E operating substrate temperature, tc 0 2.0 2.2 2.65 2.5 0.5 1.0 1.5 1.8 3.0 06080100105 40 20 120 i oh -- tc operating substrate temperature, tc -- c motor current, i oh -- a v cc =24v motor: r=0.4 l=1.2mh operating region when f cl 200hz operating region in hold mode 1.5 notes ? the current range given above represents conditions wh en output voltage is not in the avalanche state. ? tc must measure surface metal temperature on rear side center of this device. 11 2=22 0.5 7.4 3.0 5.2 32.5 8.5 2.0 26.0 0.4 112
STK672-110-SL-E no. a2139-4/11 block diagram sp 11 f1 f2 f3 f4 + - + - vref 12 resetb 6 cwb 7 gnd sub rsb c1 c2 vrefa vrefb rsa r2 r1 1 clock 9 mode a 8 v dd 10 5 ab 4 b 3 bb 2 excitation mode selection phase advance counter off time setting chopping circuit phase excitation signal generation sample application circuit co3 10 f co1 vref ro3 5v d1 co4 + + + 10 f 9 10 8 7 6 12 1 p.gnd two-phase stepping motor v cc 24v 2 3 4 5 a ab b bb gnd co2 at least 100 f v dd =5v 11 clock mode cwb STK672-110-SL-E
STK672-110-SL-E no. a2139-5/11 precautions ? to minimize noise in the 5v system, locate the ground si de of capacitor co2 in the above circuit as close as possibleto pin 1 of the ic. ? insert resistor ro3 (47 to 100 ) so that the discharge energy from capac itor co4 is not directly applied to the cmos-ic in this hybrid device. if the diode d1 has vf characteristics with vf less than or equal to 0.6v (when if = 0.1a), this will be smaller than the cm os ic input pin diode vf. if this is the case ro3 may be replaced with a short without problem. ? standard or hc type input levels are used for the pin 7, 8, and 9 inputs. ? if open-collector type circuits are used for the pin 7, 8, and 9 inputs, these circuit will be in the high-impedance state for high level inputs. as a result, chopping circuit noise ma y cause the input circuits to operate incorrectly. to prevent incorrect operation due to such noise, capacitors with values between 470 and 1000pf must be connected between pins 7 and 11, 8 and 11, and 9 and 11. (a capacitor with a value between 470 and 1000pf must be connected between pins 6 and 11 as well if an open-collector output ic is used for the resetb pin (pin 6) input.) ? taking the input bias current (i ib ) characteristics into account, the resistor ro1 must not exceed 100k . ? the following circuit (for a lowered current of over 0.2a ) is recommended if the application needs to temporarily lower the motor current. here , a value of close to 100k must be used for resistor ro1 to make the transistor output saturation voltage as low as possible. input pin functions (cmos input levels) pin pin no. function input conditions when operating clock 9 reference clock for motor phase current sw itching operates on the rising edge of the signal mode 8 excitation mode selection low: 2-phase excitation high: 1-2 phase excitation cwb 7 motor direction switching low: cw (forward) high: ccw (reverse) resetb 6 system reset and a, ab , b, and bb outputs cutoff. applications must apply a reset signal for at least 20 s when power is first applied. a reset is applied by a low level (1) a simple reset function is formed from d1, co4, and ro3 in this application circuit. with the clock input held low, when the 5v supply voltage is brought up a reset is applied if the motor output phases a and bb are driven. if the 5v supply voltage rise time is slow (over 50ms), the motor output phases a and bb may not be driven. increase the value of the capacitor co 4 and check circuit operation again. (2) see the timing chart for the concrete details on circuit operation. 5v ro1 ro2 r3 5v ro1 ro2 r3 vref vref
STK672-110-SL-E no. a2139-6/11 usage notes ? 5v system input pins [resetb and clock ?? input signal timing when power is first applied ?? ] as shown in the timing chart, a resetb signal input is requ ired by the driver to operate with the timing in which the f1 gate is turned on first. the resetb signal timing must be set up to have a width of at least 20 s, as shown below. the capacitor co4 and the resistor ro3 in the application circuit form simple reset circuit that uses the rc time constant rising time. however, when designing the resetb input based on cmos levels, the application must have the timing shown in figure 2. rise of the 5v supply voltage resetb signal input clock signal at least 10 s at least 20 s figure 2 resetb and clock signals input timing see the timing chart for details on the clock, mode, cwb, and other input pins. [vref ?? motor current peak value setting ?? ] in the sample application circuit, the peak value of the motor current (i oh ) is set by ro1, ro2, and v dd (5v) as described by the formula below. figure 3 motor current i o flowing into the driver ic i oh = vref rs here, rs is hybrid ic intern al current detection resistor vref = (ro2 (ro1+ro2)) 5v STK672-110-SL-E: rs = 0.22 ? allowable motor current operating range the motor current (i oh ) must be held within the range corresponding to the area under the curve shown in figure 1. for example, if the operating substrate temperature tc is 105 c, then i oh must be held under i oh = 1.8a, and in hold mode i oh must be held under i oh = 1.5a. i oh 0
STK672-110-SL-E no. a2139-7/11 ? thermal design [operating range in which a heat sink is not used] the STK672-110-SL-E- package has a st ructure that uses no screws, and is recommended for use without a heat sink .this section discusses the safe oper ating range when no heat sink is used. in the maximum ratings specifications, tc max is specified to be 105c, and when mounted in an actual end product system, the tc max value must never be exceeded during operation. tc can be expressed by formula (a) below, and thus the range for tc must be stipulated so that tc is always under 105c. tc = ta + tc (a) ta: hybrid ic ambient temperature, tc: temperature increase across the aluminum substrate as shown in figure 6, the value of tc increases as the hybrid ic internal average power dissipation pd increases. as shown in figure 5, pd increases with the motor curr ent. here we describe the actual pd calculation using the example shown in the motor curr ent timing chart in figure 4. since there are periods when current flows and periods when the current is off during actual motor operation, pd cannot be determined from the data presented in figure 5. therefore, we calculate pd assuming that actual motor operation consists of repetitions of the operation shown in figure 4. t1 t2 t0 t3 i o 1 -i o 1 i o 2 motor phase current (sink side) figure 4 motor current timing t1: motor rotation operation time t2: motor hold operation time t3: motor current off time t2 may be reduced, depending on the application. t0: single repeated motor operating cycle i o 1 and i o 2: motor current peak values due to the structure of motor windings, the phase current is a positive and negative current with a pulse form. note that figure 4 presents the concepts here, and that the on/off duty of the actual signals will differ. the hybrid ic internal average power dissipation pd can be calculated from the following formula. pd = (t1 p1 + t2 p2 + t3 0) t0 ------------------------------------------- (i) (here, p1 is the pd for i o 1 and p2 is the pd for i o 2) if the value calculated in formula (i) abov e is under 1.4w, then from figure 6 we see that operation is allowed up to an ambient temperature ta of 60c. while the operating range when a heat sink is not used can be determined from formula (i) above, figure 5 is merely asingle example of one operating mode for a single motor. for example, while figure 5 shows a 2- phase excitation motor, if 1-2 phase excitation is used with a 500hz clock frequency, the drive will be turned off for 25% of the time an d the dissipation pd will be reduced to 75% of that in figure 5. it is extremely difficult for calculate the internal average power dissipation pd for all possible end product conditions. after performing the above rough calculations, always install the hybrid ic in an actual end product and verify that the substrate temperature tc does not rise above 105c.
STK672-110-SL-E no. a2139-8/11 timing charts 2-phase excitation 1-2 phase excitation mode resetb cwb clock gate f1 gate f2 gate f3 gate f4 v refa 100% v refb 100% mode resetb cwb clock gate f1 gate f2 gate f3 gate f4 v refa 100% v refb 100%
STK672-110-SL-E no. a2139-9/11 1-2 phase excitation 2-phase excitation switch to 1-2 phase excitation mode resetb cwb clock gate f1 gate f2 gate f3 gate f4 v refa 100% v refb 100% mode resetb cwb clock gate f1 gate f2 gate f3 gate f4 v refa 100% v refb 100%
STK672-110-SL-E no. a2139-10/11 figure 5 hybrid ic internal average power dissipation, p d - motor current, i oh 0 8 7 9 11 10 2 1 4 3 6 5 12 0 1.5 2.0 2.5 1.0 0.5 3.0 p d -- i oh motor current, i oh -- a hybrid ic internal average power dissipation, p d -- w v cc =24v, v dd =5.0v clock=500hz continuous 2-phase excitation operation motor used: r=0.63 l=0.62mh the data are typical values. figure 6 substrat e temperature rise, tc - hybrid ic internal average power dissipation, p d 0 70 20 10 40 30 60 50 80 0 1.5 2.0 2.5 1.0 0.5 3.0 ? tc -- p d hybrid ic internal average power dissipation, p d -- w substrate temperature rise, ? tc -- c with no heat sink, the ic vertical, and convection cooling
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